Mark M. Tehranipoor, PhD, Fellow of IEEE, ACM, NAI

Intel Charles E. Young Preeminence Endowed Chair Professor in Cybersecurity

Chair, ECE Department, University of Florida

Co-founder, IEEE Int. Symposium on Hardware-Oriented Security and Trust (HOST), IEEE AsianHOST, AND IEEE PAINE

Director, Edaptive Computing Inc. Transition Center (ECI-TC)

Co-director, AFOSR/AFRL Center of Excellence on Enabling Cyber Defense in Analog and Mixed Signal Domain (CYAN)

Co-director, National Microelectronic Security Training Center (MEST)

Professional Activities

Chair Positions:

  • Co-general Chair, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), 2022
  • Vice-Program Chair, IEEE International Worshop on Silicon Lifecycle Management (SLM), 2021
  • Co-general Chair, IEEE International Symposium on Hardware-Oriented Security and trust (HOST), 2021
  • General Chair, IEEE International Conference on Physical Assurance and Inspection of Electronics (PAINE), 2019-2021
  • Program Chair, International Test Conference (ITC), 2019
  • Vice-program Chair, International Test Conference (ITC), 2018
  • Co-program Chair, IEEE International Verification and Security Workshop (IVSW), 2016
  • Co-program Chair, IEEE International Workshop on Cross-Layer Cyber-Physical Systems Security (CPSS), 2016
  • Program Chair, ARO/CHASE Special Workshop on Counterfeit Electronics, University of Connecticut, January 2013
  • Program Chair, ARO Special Workshop on Hardware Assurance, Washington DC, April 2011
  • Program Chair, ARO Special Workshop on Hardware Assurance, University of Connecticut, August 2009
  • General Chair, IEEE Workshop on Defect and Data Driven Testing (D3T), 2009
  • General Chair, International Symposium on Defect and Fault Tolerance of VLSI Systems (DFT), 2009
  • General Chair, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), 2009
  • Program Chair, IEEE Workshop on Defect and Data Driven Testing (D3T), 2008, Santa Clara, CA
  • Chair, Steering Committee, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), 2008-present
  • General Chair, 1st IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), 2008
  • Program Chair, IEEE Workshop on Defect Based Testing (DBT), 2007, Santa Clara, CA
  • Vice-General Chair, IEEE North Atlantic Test Workshop (NATW), 2011
  • Co-Program Chair, International Symposium on Defect and Fault Tolerance of VLSI Systems (DFT), 2008, Boston,MA
  • Local Arrangement Chair, IEEE Int. Symp. on Defect and Fault Tolerance in VLSI Systems (DFT), 2006
  • Member, Steering Committee, IEEE International Verification and Security Workshop (IVSW), 2016-present
  • Member, Steering Committee, IEEE Workshop on Defect and Data Driven Testing (D3T), 2009-2010
  • Member, Steering Committee, IEEE Workshop on Defect and Adaptive Test Analysis (DATA), 2011-present
  • Security Special Session Track Chair, IEEE International Microprocessor Test and Verification (MTV), 2016
  • Co-program Chair, Internet of Things (IoT) and Automotive Security Workshop (IASW), co-located with HOST Symposium, 2017-present
  • Industry Liaison, Workshop for Women in Hardware and Systems Security (WISE), 2017-present
  • Industry Liaison, IEEE Asian Symposium on Hardware-Oriented Security and Trust (AsianHOST), 2016
  • Panel Chair, IEEE Asian Symposium on Hardware-Oriented Security and Trust (AsianHOST), 2017

Founding Positions:

  • Founder, SCALES: Southeast Consortium on Assured and Leading-Edge Semiconductors
  • Co-founder, IEEE International Physical Attacks and Inspection on Electronics (PAINE) Conference
  • Co-founder, International IEEE Verification and Security Workshop (IVSW)
  • Co-founder, Trusted and Assured Microelectronics (TAME) Forum
  • Co-founder, IEEE Asian Symposium on Hardware-Oriented Security and Trust (Asian HOST)
  • Co-founder, Journal of Hardware and Systems Security (HASS), 2016-present
  • Director & Founder, Florida Institute for Cybersecurity (FICS), 2015-present
  • Founder and Director, Center for Hardware Assurance, Security, and Engineering (CHASE), 2012-2015
  • Founder and Director, Comcast Center of Excellenxe in Security Innovation (CSI), 2013-2015
  • Co-founder,, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), 2008
  • Co-founder,, Trust-Hub, 2010

Editorial Boards:

  • Editor-in-Chief (EIC), Journal of Hardware and Systems Security (HASS), 2016-present
  • Associate Editor-in-Chief (EIC), IEEE Design & Test, 2012-2014
  • Associate Editor, IEEE Transactions on Computers, 2019-present
  • Associate Editor, ACM Transactions on Design Automation of Electronic Systems (TODAES), 2013-2020
  • Associate Editor, IEEE Design & Test of Computers, 2009-2017
  • Associate Editor, Journal of Low Power Electronics (JOLPE), 2010-present
  • Associate Editor, Journal of Electronic Testing: Theory and Applications (JETTA), 2007-present
  • Editor, TTTC Newsletter, 2008-2010
  • Guest Editor, Special issue on CAD for Security: Pre-silicon Security Sign-off Solutions Through Design Cycle, ACM Journal on Emerging Technologies in Computing Systems (JETC), 2022, F. Farahmandi, A. Srivastava, G. Di Natale, and M. Tehranipoor
  • Guest Editor, IEEE Transactions on Dependable and Secure Computing (TDSC), Special Issue on “Emerging Attacks and Solutions for Secure Hardware in the Internet of Things”, Guest Editors: Chip Hong Chang, Marten van Dijk, and U. Ruhrmair, 2017
  • Guest Editor, IEEE Transactions on Multi-Scale Computing Systems, Special Issue on “Hardware and Software Cross-Layer Technologies for Trustworthy and Secure Computing”, Guest Editors: Shiyan Hu (Michigan Technological University), Yier Jin (University of Central Florida), Mark M. Tehranipoor (University of Connecticut), Kenneth Heffner (Honeywell), 2015
  • Guest Editor, IEEE Design & Test Special Issue on “On-Chip Structures for Smarter Silicon”, Guest Editors: Mohammad Tehranipoor (UConn) and LeRoy Winemberg (Freescale Semiconductor), 2012
  • Guest Editor, IEEE Computer Society Computing Now Special Issue on “Hardware Security and Trust”, Guest Editors: Mohammad Tehranipoor (UConn) and Farinaz Koushanfar (Rice University), 2010
  • Guest Editor, IEEE Design & Test Special Issue on “Verifying Physical Trustworthiness of Integrated Circuits and Systems”, Guest Editors: Mohammad Tehranipoor (UConn) and Farinaz Koushanfar (Rice University), 2009
  • Guest Editor , Special issue on “Test, Defect Tolerance, and Reliability of Nanoscale Devices”, Journal of Electronic Testing: Theory and Applications (JETTA), 2007
  • Guest Editor , Special issue on “IR-Drop and power Supply Noise Effects on Design and Tetst of Very Deep Submicron Designs”, IEEE Design & Test of Computers, Guest Co-editor: Ken Butler (Texas Instruments), 2007

Non-IEEE/ACM Events Position:

  • Member, Scientific Advisory Board, Center for Advanced Studies, LMU Munich
  • Chair, Advisory Board, SECURE Center. Prairie View A&M University (PVAMU)
  • Florida State University System (SUS) Cybersecurity Steering Group (Governing Council), 2020-present
  • Co-Chair, Trusted and Assured Microelectronics (TAME) Forum, Nov. 2017
  • Steering Committee, Trusted and Assured Microelectronics (TAME) Forum
  • Chair, FICS Annual Conference on Cybersecurity, March 2017. 13 companies sponsored this event. 210 attended.
  • Chair, FICS Annual Conference on Cybersecurity, February 2016. 12 companies sponsored this event. 155 attended.
  • Chair, CHASE Conference on Secure/Trustworthy Systems and Supply Chain Assurance, 2015. 10 companies sponsored this event.
  • Co-organizer, CyberSEED, More than a dozen companies sponsored this event. 2014
  • Chair, CHASE Workshop on Secure/Trustworthy Systems and Supply Chain Assurance, 2014
  • Chair, ARO/CHASE Sponsored Workshop on Counterfeit Electronics, 2013
  • Chair, 2nd ARO Sponsored Workshop on Hardware Assurance, 2011
  • Chair, 1st ARO Workshop on Hardware Assurance, 2009

Session Organizer:

  • Special Session, Emerging Topics in Security and Trust I, International Test Conference (ITC), 2017 (Speakers: (Domenic Forte (University of Florida), Jeyavijayan Rajendran (Texas A&M University), and Krishnendu Chakrabarty (Duke University))
  • Special Session, Emerging Topics in Security and Trust II, International Test Conference (ITC), 2017 (Speakers: Brian Dupaix (AFRL), Patrick Schaumont (Vriginia Tech), and An Chen (Semiconductor Research Corporation)
  • Special Session, Physical Attacks: Can Test Save Us?, IEEE VLSI Test Symposium (VTS), 2017
  • Special Session 1, IP Protection, IEEE Microprocessor Test and Verification (MTV), 2016
  • Special Session 2, Test for Security and Trust, IEEE Microprocessor Test and Verification (MTV), 2016
  • Special Session, Test for Security and Trust of Integrated Circuits, International Test Conference (ITC), 2016
  • Special Session, Security Validation in IOT Space, IEEE VLSI Test Symposium (VTS), April 2016
  • Special Session, Electronic Supply Chain Security, IEEE VLSI Design, India, Jan 2016
  • Special Session, New Directions in Hardware Security, IEEE Microprocessor Test Workshop, Austin, 2015, With Domenic Forte (University of Florida)
  • HOT Topic Session on Counterfeit Electronics, IEEE VLSI Test Symposium (VTS), May 2013 (with Ilia Polian, University of Passau)
  • Smart Silicon, IEEE VLSI Test Symposium (VTS), May 2011 (with LeRoy Windemberg, Freescale Semiconductor)
  • Moderator, Roundtable on Hardware Security and Trust, IEEE Design & Test Magazine, September/October 2011

Professional Memberships:

  • Fellow, ACM
  • Fellow, IEEE
  • Fellow, NAI
  • Fellow, Connecticut Academy of Science and Engineering (CASE)
  • Golden Core Member, IEEE
  • Member, ACM SIGDA
  • Member, TTTC
  • Member, TTTC Middle East and Africa Group

Program Committee Memberships:

  • Research in Attacks, Intrusions and Defenses (RAID)
  • IEEE Microprocessor Test and Verification (MTV)
  • Smart City Security and Privacy (SCSP)
  • Design Automation Conference (DAC)
  • International Test Conference (ITC)-Asia
  • Design Automation Conference (DAC) Panel Committee
  • IEEE CS Annual Symposium on VLSI (ISVLSI)
  • IEEE Conference on Very Large Scale Integration
  • International Test Conference (ITC)
  • CSI International Symposium on Computer Architecture & Digital Systems (CADS)
  • Design, Automation, and Test in Europe (DATE)
  • IEEE Asian Test Symposium (ATS)
  • European Test Symposium (ETS)
  • IEEE VLSI Test Symposium (VTS)
  • ACM SIGDA Ph.D. DAC Forum
  • International Conference on Nano-Networks (Nano-Net)
  • IEEE Workshop on RTL and High Level Testing (WRTLT)
  • ACM Great Lake Symposium on VLSI (GLSVLSI)
  • International Conference on Communication Theory, Reliability, and Quality of Service (CTRQ)
  • IEEE Int. Workshop on Defect Based Testing (DBT)
  • IEEE Int. Workshop on Data and Defect Drive Test (D3T)
  • IEEE Int. Defect and Adaptive Test Analysis (DATA)
  • Int. Conference on Computer Design (ICCD)
  • North Atlantic Test Workshop (NATW)
  • IEEE Int. Symp. on Defect and Fault Tolerance in VLSI Systems (DFT )
  • IEEE International Design and Test Workshop (IDT)
  • International Symposium on Nanoscale Architectures (NanoArch)
  • IEEE Int. On-Line Testing Symposium (IOLTS)
  • Int. Workshop on Impact of Low-Power Design on Test and Reliability
  • Workshop on Unique Chips and Systems (UCAS)
  • IEEE Workshop on Design for Reliability and Variability (DRV)

Session Chair:

  • Int. Workshop on Current and Defect-Based Testing (DBT)
  • IEEE North Atlantic Test Workshop (NATW)
  • International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT)
  • Design Automation Conference (DAC)
  • International Symposium on Nanoscale Architectures (NanoArch)
  • International Test Conference (ITC)
  • IEEE Workshop on RTL and High Level Testing (WRTLT)
  • IEEE VLSI Test Symposium (VTS)
  • International Test Conference (ITC)

Selected Review Activities:

  • National Science Foundation (NSF)
  • IEEE Transactions on Computer-Aided Design of of Integrated Circuits and Systems
  • IEEE Transactions on Very Large Scale Integration Systems
  • IEEE Transactions on Computers
  • ACM Transactions on Design Automation of Electronic Systems (TODAES)
  • Journal of Electronic Testing: Theory and Applications (JETTA)
  • ACM Journal on Emerging Technologies in Computing Systems (JETC)
  • Design, Automation, and Test in Europe (DATE)
  • IEEE Conference on VLSI
  • IEEE Workshop on RTL Test (ARTLT)
  • International Test Conference (ITC)
  • Great Lake Symposium on VLSI (GLSVLSI)
  • IBM Journal of Research and Development
  • IEEE North Atlantic Test Workshop (NATW)
  • IEEE Communication Magazine
  • IEEE VLSI Test Symposium (VTS)
  • International Conference on Microelectronics (ICM)
  • International Journal of Computers and Applications
  • IEEE Asian Test Symposium (ATS)
  • Design Automation Conference (DAC)