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Mark M. Tehranipoor, PhD

Intel Charles E. Young Preeminence Endowed Chair Professor in Cybersecurity

ECE Department, University of Florida

Co-founder, International Symposium on Hardware-Oriented Security and Trust (HOST)

Co-director, Florida Institute for Cybersecurity Research (FICS)

Email: lastname at ufl dot edu

Selected Presentations and Invited Talks


Selected Invited Talks and Keynote Addresses:

  • IEEE Asian Hardware-Oriented Security and Trust (AsianHOST), Dec. 2016, Taiwan, Title: Security Rule Check (Keynote Address)
  • IEEE Microprocessor Test and Verification (MTV) Conference, Austin, TX, Dec. 2016, Title: Security Rule Check: A Closer Look at the Automated Test for Security (Keynote Address)
  • Global Foundries, CTO Speaker Series, Malta, NY, December 2016
  • Chinese Academy of Science (CAS), China, 2016
  • International Workshop on on Hardware Security, China, 2016, Title: Hardware Security: Past, Present, and the Future (Keynote address)
  • Peking University, China, 2016
  • Beihang University, China, 2016
  • Dagstuhl Seminar, Germany, 2016, Title: Unlocking the potential of Hardware Security
  • IEEE International Reliability Physics Symposium (IRPS), 2016, Title: Security vs. Reliability: Where Do These Two Road Converge?
  • IEEE Workshop on CPS Security, April 2016, San Francisco, CA (Keynote Speaker)
  • US-Brazil Joint Workshop on Cybersecurity, April 2016, Orlando, FL (Keynote Speaker)
  • Florida Institute of Technology (FIT), Host: Dr. Fareena Saqib, Melbourne, FL, March 2016
  • Florida Energy Systems Consortium (FESC) , March 2016
  • International Symposium on Quality Electronic Design (ISQED) , Santa Clara, March 2016, Title: New Frontiers in Hardware Security and Trust (Keynote Address)
  • Northrop Grumman , Sep. 2015, Washington DC
  • IEEE/ACM International Conference on Computer-Aided Design (ICCAD) , Nov. 2015, Austin, TX
  • Potomac Institute for Policy (PIP) , Oct. 2015
  • DHS Software and Supply Chain Assurance Forum , Nov. 2015
  • NSF WATCH Talk , July 2015, Washington DC
  • Global Foundries, Dec. 2014, Malta, NY
  • Freescale Semiconductors’ Technical Enrichment Conference (Keynote Speaker), Dec. 2014, Austin, TX
  • Cadence, Dec. 2014, Austin, TX
  • Missile Defense Agency (MDA) PMPB Meeting, Nov. 2014, Hunsville, Alabama
  • Beihang University, Nov. 2014, HOST: Prof. Michel Wang
  • IEEE Asian Test Symposium (ATS), Nov. 2014
  • Army Research Office (ARO) Workshop, NYC, Nov. 2014
  • Honeywell International, Oct. 2014, HOST: Dan DiMase and Dr. Ken Heffner
  • Sharif University of Technology, July 2014, HOST: Dr. Siavash Bayat
  • Shahid Beheshti University, July 2014, HOST: Dr. Ali Jahanian
  • Amirkabir University of Technology, June 2014, HOST: Drs. Saheb Zamani and Hamid Zarandi
  • Cisco Corporation, May 2014, Host: Dr. Wei Zhao
  • Xilinx Corporation, May 2014, Host: Dr. Amit Majumdar
  • IEEE North Atlantic Test Workshop (NATW), May 2014 (Keynote speaker)
  • Design, Automation, and Test in Europe (DATE), Dresden, Germany, March 2014
  • IEEE International Workshop on Reliability-Aware Systems Design and Test (RASDAT) , Bombay, India, January 2014 (Keynote Speaker)
  • IEEE Microprocessor Test and Verification (MTV) Workshop, Austin, TX, December 2013
  • DMSMS, December 2013, Counterfeit Defect Coverage
  • DMSMS, December 2013, Combating Die/IC Recovery
  • Army Research Office (ARO) Workshop, NYC, November 2013
  • Honeywell, Cyber Security Group Meeting, November 2013
  • National Cao Tung University, Taiwan, November 2013
  • MediaTek, Taiwan, November 2013
  • CALCE Symposium on Counterfeit Electronic Parts and Electronic Supply Chain, June 2013
  • United Technologies Research Center (UTRC), May 2013
  • NASA Quality Leadership Forum, March 2013
  • Trusted Supplier Industry, March 2013
  • Trusted Supplier Industry, March 2013
  • Cisco, Security Group, March, 2013, Title: SiliconAP: A novel Platform for Counterfeit Prevention
  • ARO/CHASE Workshop on Counterfeit Electronics, Jan. 2013, Counterfeit Detection Assessment
  • ARO/CHASE Workshop on Counterfeit Electronics, Jan. 2013, Silicon Authentication Platform
  • NSF/SRC SA+TS Workshop, Washington DC, Jan. 2013
  • Microelectronics Reliability and Qualification proposal (MRQW), Dec. 2012
  • DMSMS Standardization Conference, Nov. 2012, Title: Secure Split Test for Counterfeit Avoidance
  • DMSMS Standardization Conference, Nov. 2012, Title: Counterfeit Test Technology Readiness Assessment
  • SRC e-workshop, November 2012
  • University of Pittsburgh, April 2012, HOST: Prof. Kartik Mohanram
  • University of Illinois at Chicago, March 2012, HOST: Prof. Wenjing Rao
  • University of Arkansas, Sep. 2012, HOST: Prof. Jia Di
  • Symposium on Counterfeit Electronic Parts and Electronic Supply Chain, June 2012
  • IEEE Asian Test Symposium (ATS), Nov. 2012
  • San Jose State University, March 2012, HOST: Prof. Shahab Ardalan
  • IEEE Workshop on Defect and Adaptive Data Analysis (DATA), September 2011
  • University of South Florida, July 2011, Host: Prof. Sanjukta Bhanja
  • Low Power SOC Workshop (LPSOC), July 2011
  • IBM TJ Watson, June 2011
  • Qualcomm, June 2011
  • Cisco, May 2011
  • IEEE VLSI Test Symposium (VTS), May 2011, Dana Point, CA
  • Virginia Tech, April 22, 2011, Host: Prof. Patrick Schaumont, IEEE DVP program
  • NYU-Abu Dhabi Workshop on Test, New York, NY, April 2011, Host: Prof. Ozgur Sinanoglu
  • University of Maryland, April 2011, Host: Prof. Gang Qu
  • ARO Workshop on Hardware Assurance, Washington, DC, April 2010
  • University of South Florida, March 2011, IEEE CS Tampa Chapter, IEEE DVP program
  • GOMACtech Conference, March 2011, Orlando, FL
  • LSI, March 4, 2011
  • LSI, March 10, 2011
  • University of Wisconsin, Madison, Feb. 2011
  • MediaTek, Boston, MA, Nov. 2010, HOST: Harry Chen
  • Freescale, Austin, TX, Nov. 2010,  HOST: LeRoy Winemberg
  • Brown University, Providence, Oct. 2010,  RI, Host: Prof. Sherief Reda
  • Texas Instruments, Dallas, TX, Oct. 2010,  Host: Dr. Nisar Ahmed
  • University of Texas, Arlington, TX, Oct. 2010,  Host: Prof. Robert Magnusson
  • NYU-Poly, New York, NY, August 2010, HOST: Prof. Ramesh Karri
  • Qualcomm, San Diego, CA, August 2010, HOST: Mike Laisne
  • LSI, Milpitas, CA, June 2010, HOST: Dr. Sreejit Chakravarty
  • Cisco, June 2010, HOST: Nemat Bidokhti
  • NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2010)
  • IBM, May 2010, Invited by: Dr. Phil Nigh
  • Connecticut Microelectronics and Optoelectronics Consortium (CMOC), 2010
  • University of Massachusetts, Lowell, March 2010, HOST: Prof. Martin Margala
  • LSI Logic, Jan 2010, HOST: Dr. Sreejit Chakravarty
  • Information Security Council (INFOSEC), Jan 2010
  • IBM-Austin Research Lab (IBM-ARL), Nov. 2009, HOST: Dr. Anne Gattiker
  • ARO Special Workshop on Hardware Assurance, 2009
  • AMD, July 2009, Host: Dr. Mahmut Yilmaz / Jeff Fitzgerald
  • Amirkabir University of Technology, July 2009, Host: Dr. A. Bagheri
  • Cisco, May 2009, Host: Nemat Bidokhti
  • Southwest DFT (SWDFT-2009), Austin, TX
  • Duke University, April 2009, Host: Prof. Krishnendu Chakrabarty
  • University of Rhode Island, April 2009, Host: Prof. Resit Sendag
  • Worcester Polytechnic Institute (WPI), March 2009, Host: Prof. Xinming Huang
  • Mentor Graphics, Feb 2009, Host: Dr. Yu Huang
  • University of Connecticut, Feb. 2009
  • University of Tehran, 2nd Talk, Dec. 2008, Host: Dr. M. Hashemi
  • University of Tehran, Dec. 2008, Host: Dr. M. Hashemi
  • Sharif University of Technology, Dec. 2008, Host: Dr. G. Miremadi
  • Baabol University of Technology, Dec. 2008, Host: Dr. H. Miar Naimi
  • IEEE Workshop on Design for Reliability and Variability (DRV), Oct. 2008, Title: ATPG for Increased Quality and In-Field Reliability
  • IBM TJ Watson, Nov. 2008, Host: Dr. Jinjun Xiong
  • Intel, Nov. 2008
  • FIST, Japan, Dec. 2008, Title: Dealing with Power and Signal Integrity Issues During Test in Nanometer Technology Designs
  • Fukuoka Industry, Science & Technology Foundation (FIST), Japan, Dec. 2008, Title: Verifying Trustworthiness of Integrated Circuits
  • IBM, Aug. 2008, Invited by: Dr. Phil Nigh
  • Magma, April 2008, Host: Dr. Sandeep Goel
  • Invited Speaker, SRC e-Workshop, Feb. 2008, Title: High-Quality Delay Tests for Nanotechnology Designs
  • Freescale, Austin, TX, Dec. 2007, Host: Dr. Magdy Abadir/Dr. Raj Raina
  • Texas Instruments, Dallas, TX, Dec. 2007, Hosts: Vinay Jayaram / Dr. Ken Butler
  • TranSwitch, Bedford, MA, Nov. 2007, Host: Zahi Abuhamdeh
  • AMD, Boston, MA, Nov. 2007, Host: Dr. Kamran Zarrineh
  • Analog Devices, Boston, MA, Nov. 2007, Host: Harry Chen
  • Guest Speaker, Magma's Luncheon Event at International Test Conference (ITC), San Jose, CA, Tuesday Oct. 23, 2007
  • Cadence, June 2007, Title: IR-drop Tolerant AT-speed Tests for Nanometer Technology Designs, Host: Dr. Krishna Chakravadhanula
  • LSI Logic, June 2007, Title: Generating High Quality At-speed Tests for Nanometer Technology Designs: Challenges and Solutions, Invited by: Dr. Sreejit Chakravarty
  • Qualcomm (San Diego, CA), June 2007, Title: At-speed Test for Nanotechnology: Challenges and Solutions, Host: Dr. Sagar Sabade
  • Guest Lecturer for VLSI System Testing Course of ECE Department at Duke University, Instructor: Prof. Krish Chakrabarty
  • Mentor Graphics (Wilsonville, OR), Nov. 2006, Title: At-speed Test for Nanotechnology: Challenges and Solutions, Host: Dr. Nilanjan Mukherjee
  • LSI Logic (San Jose, CA), Nov. 2006, Title: High Quality At-speed Tests for Nanotechnology Designs, Host: Dr. Arun Gunda
  • AMD (Sunnyvale, CA), Oct. 2006, Title: High Quality At-speed Tests for Nanometer High-speed Designs, Host: Dr. Anuja Sehgal
  • Texas Instruments (Dallas, TX), April 2004, Title: Enhanced Scan Architectures for Reducing Power and Test Application Time

Panels:

  • Panel Organizer, International Test Conference, 2016, Test and Security for IoTs
  • Panelist, International Workshop on Hardware Security, 2016, Research Collaboration Opportunities in Hardware Security Areas
  • Panel Organizer, IEEE International Verification and Security Workshop (IVSW), 2016, Title: DFT vs. Security – Is it a Contradiction? How Can we Get the Best of Both World?
  • Panel Organizer, IEEE International Hardware-Oriented Security and Trust (HOST), 2016, Title: Hardware-based System Security
  • Panel Organizer and Moderator, IEEE International Hardware-Oriented Security and Trust (HOST), 2016, Title: IP Protection from Chip-to-System Using Reverse Engineering
  • Panelist, International Symposium on Quality Electronic Design (ISQED), 2016, Title: Hardware and Systems Security Challenges in IoT Era
  • Panel Organizer / Panelist, IEEE VLSI Test Symposium (VTS), April 2016, Title: Test Opportunities for Secure Hardware
  • Panelist, Florida International University (FIU) Cybersecurity Meeting, Miami, FL, Oct. 2015
  • Panelist, IEEE Security and Privacy Symposium (S&P), San Jose, CA, May 2014
  • Panelist, SRC STARSS (), San Jose, CA, May 2014
  • Panelist, Microprocessor Test and verification (MTV), Nov. 2013
  • Panelist, IEEE North Atlantic Test Workshop (NATW), May 2013
  • Panelist, Cisco innovation Test Conference (CITC), 2012
  • Panel Moderator, Title: Low Power Testing, IEEE VLSI Test Symposium (VTS), May 2011
  • Panelist, International Test Conference (ITC), 2010
  • Panelist, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), 2010
  • Panelist, IEEE Symposium on Defect and Fault Tolerance in VLSI Systems (DFT), 2009
  • Panelist, International Test Conference (ITC), Nov. 2009, Austin, TX
  • Panel Organizer, Title: Test and Diagnosis for Parametric Failures,  Int. Workshop on  Defect and Data Driven Testing, (D3T), Nov. 2009
  • Panel Organizer, Title: Zero Defect (Zero DPPM): How can we get there?,  Int. Symposium on Defect and Fault Tolerance in VLSI Systems (DFT), Oct. 2008
  • Panel Co-organizer, Title: Challenges in Test Data Collection and Analysis, Int. Workshop on  Defect and Data Driven Testing, (D3T), Oct. 2008
  • Panelist, WRTLT, Sapporo, Japan, Nov. 2008.
  • Panel Co-organizer (with Hank Walker, Texas A&M University), Title: Process Variations + Systematic Defects: Can DBT Help? , International Workshop on Defect-Based Testing (DBT), 2007.
  • Panel Co-organizer (with Kee Sup Kim from Intel), Title: Three Questions to Oracle (Data required for test engineers and researchers in academia), IEEE VLSI Test Symposium (VTS), 2006
  • Proposal reviewer and panelist for the National Science Foundation (NSF), 2005, 2006, 2009 

Tutorials:

  • Dagstuhl Seminar, Germany, 2016, Hardware Security,
  • International Test Conference (ITC), 2015, Test Opportunities and Challenges for Secure Hardware and Verifying Trust in Integrated Circuits, M. Tehranipoor (University of Florida) and D. Forte (University of Florida)
  • Design Automation Conference (DAC), 2015, Introduction to Hardware Security, M. Tehranipoor (University of Florida), M. Potkonjak (UCLA), and Ron Perez (CRI)
  • IEEE International System-on-Chip Conference (SOCC), 2014, Electronic Component Supply Chain Security: Threats, Challenges, and Solution, M. Tehranipoor (UCONN)
  • Design, Automation, and Test in Europe (DATE), 2014, All You Need to Know About Hardware Trojans and Counterfeit ICs, M. Tehranipoor and D. Forte (UCONN)
  • IEEE Conference on VLSI, 2014, All You Need to Know About Hardware Trojans and Counterfeit ICs, M. Tehranipoor and D. Forte (UCONN)
  • IEEE International Reliability Physics Symposium (IRPS), 2013, Chip to System Reliability Fundamentals, Mohammad Tehranipoor (UConn), Nemat Bidokhti (Cisco), and Bill Eklow (Cisco)
  • International Test Conference (ITC), 2011, Testing Low-Power Integrated Circuits: Challenges, Solutions, and Industry Practices, Srivaths Ravi (Texas Instruments), Mohammad Tehranipoor (UConn), and Rohit Kapur (Synopsys)
  • International Test Conference (ITC), 2011, High-Quality and Low-Cost Delay Testing for VDSM Designs: Challenges & Solutions, Mohammad Tehranipoor (UConn), Krish Chakrabarty (Duke University), and Jeff Rearick (AMD)
  • Design Automation Conference (DAC), 2011, Chip to System Reliability Fundamentals, Mohammad Tehranipoor (UConn), Nemat Bidokhti (Cisco), and Bill Eklow (Cisco)
  • International Test Conference (ITC), 2010, Testing Low-Power Integrated Circuits: Challenges, Solutions, and Industry Practices, Srivaths Ravi (Texas Instruments), Mohammad Tehranipoor (UConn), and Rohit Kapur (Synopsys)
  • International Test Conference (ITC), 2010, High-Quality and Low-Cost Delay Testing for VDSM Designs: Challenges & Solutions, Mohammad Tehranipoor (UConn), Krish Chakrabarty (Duke University), and Jeff Rearick (AMD)
  • Design, Automation, and Test in Europe (DATE), 2010, Testing Low-Power Integrated Circuits: Challenges, Solutions, and Industry Practices, Srivaths Ravi (Texas Instruments), Mohammad Tehranipoor (UConn), Rohit Kapur (Synopsys)
  • International Conference on VLSI, 2009, High-Quality and Low-Cost Delay Testing for VDSM Designs: Challenges & Solutions, Mohammad Tehranipoor (UConn) and Krish Chakrabarty (Duke University)
  • Midwest Symposium on Circuits and Systems (MWSCAS), 2008, Title: High-Quality Delay Tests for Nanometer Technology Designs

Selected Presentations:

  • SRC Annual Grant Review, 2011, Arizona State University
  • Design, Automation, and Test in Europe (DATE), 2010, Title: High-Quality Pattern Selection for Screening Small-Delay Defects Considering Process Variations and Crosstalk
  • Design, Automation, and Test in Europe (DATE), 2010, Title: Novel Physical Unclonable Function Based on Process and Environmental Variations
  • IEEE Int. Workshop on Hardware-Oriented Security and Trust (HOST), 2009
  • Int. Conference on Computer-Aided Design (ICCAD), 2008
  • Int. Symposium on Defect and Fault Tolerance (DFT), Oct. 2008
  • Title:Hardware Trojan Detection and Isolation Using Current Integration and Localized Current Analysis
  • Int. Workshop on Hardware-Oriented and Security (HOST), June 2008
  • Title: Detection of Malicious Inclusions in Secure Hardware: Challenges and Solutions
  • Design, Automation & Test in Europe (DATE), March 2008
  • Title: Layout-Aware, IR-Drop Tolerant Transition-Delay Fault Pattern Generation
  • Design Automation Conference (DAC), 2007
  • Title: Transition Delay Fault Test Pattern Generation Considering Supply Voltage Noise in a SOC Design
  • SRC Annual Review, 2010
  • SRC Annual Review, 2009
  • SRC Annual Review, 2008
  • SRC Annual Grant Review, 2007, Duke University, NC, Title: At-speed Transition Delay Test Using Low-Cost Testers
  • IEEE North Atlantic Test Workshop (NATW), 2007, Boxborough, MA, Title: IR-drop Tolerant Transition Delay Fault Testing in SOC Designs
  • ICCAD, Oct. 2006, Title: A Novel Framework for Faster-than-at-Speed Test Considering IR-drop Effects
  • DBT 2006, Title: Improving ATPG and Pattern Generation Selection for Screening Small Delay Defects
  • SRC Annual Grant Review, 2006, UCSB, CA, Title: At-speed Transition Delay Test Using Low-Cost Testers
  • Design Automation Conference (DAC), 2006
  • Title: A Hybrid FPGA Using Nanoscale Cluster and CMOS Scale Routing
  • Title: Timing-Based Delay Test for Screening Small Delay Defects
  • IEEE VLSI Test Symposium (VTS), Elevator Talk, 2006, Title: IR-Drop Effects on Faster-than-at-speed Delay Test
  • IEEE North Atlantic Test Workshop (NATW), 2005, Title: At-Speed Transition Fault Testing Using Low Speed Testers with Application to Reduced Scan Enable Routing Area
  • IEEE VLSI Test Symposium (VTS), 2005: Title: At-Speed Transition Fault Testing With Low Speed Scan Enable
  • Midwest Symposium on Circuits and Systems (MWSCAS), 2005
    • Title: Architecture of an Embedded Queue Management Engine for High-Speed Network Devices
    • Title: NnSP: Embedded Neural Networks Stream Processor
  • University of Maryland, Baltimore County (UMBC), 2004, Title: Nine-Coded Compression Technique for Reducing Test Application Time
  • University of Texas at Dallas, Center for Integrated Circuits and Systems (CICS), 2003, Title: Low-Power Test Pattern Generation Techniques
  • Midwest Symposium on Circuits and Systems (MWSCAS), 2002
    • Title: Test Optimization of Bus-Structured SoCs Using Embedded Microprocessor
    • Title: Fast Prototyping of a DSP Core