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Mark M. Tehranipoor, PhD

Intel Charles E. Young Preeminence Endowed Chair Professor in Cybersecurity

ECE Department, University of Florida

Co-founder, International Symposium on Hardware-Oriented Security and Trust (HOST)

Co-director, Florida Institute for Cybersecurity Research (FICS)

Email: lastname at ufl dot edu

Professional Activities


Chair Positions:

  • Co-program Chair, IEEE International Verification and Security Workshop (IVSW), 2016
  • Co-program Chair, IEEE International Workshop on Cross-Layer Cyber-Physical Systems Security (CPSS), 2016
  • Program Chair, ARO/CHASE Special Workshop on Counterfeit Electronics, University of Connecticut, January 2013
  • Program Chair, ARO Special Workshop on Hardware Assurance, Washington DC, April 2011
  • Program Chair, ARO Special Workshop on Hardware Assurance, University of Connecticut, August 2009
  • General Chair, IEEE Workshop on Defect and Data Driven Testing (D3T), 2009
  • General Chair, International Symposium on Defect and Fault Tolerance of VLSI Systems (DFT), 2009
  • General Chair, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), 2009
  • Program Chair, IEEE Workshop on Defect and Data Driven Testing (D3T), 2008, Santa Clara, CA
  • Chair, Steering Committee, IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), 2008-present
  • General Chair, 1st IEEE International Workshop on Hardware-Oriented Security and Trust (HOST), 2008
  • Program Chair, IEEE Workshop on Defect Based Testing (DBT), 2007, Santa Clara, CA
  • Vice-General Chair, IEEE North Atlantic Test Workshop (NATW), 2011
  • Co-Program Chair, International Symposium on Defect and Fault Tolerance of VLSI Systems (DFT), 2008, Boston,MA
  • Local Arrangement Chair, IEEE Int. Symp. on Defect and Fault Tolerance in VLSI Systems (DFT), 2006
  • Member, Steering Committee, IEEE International Verification and Security Workshop (IVSW), 2016-present
  • Member, Steering Committee, IEEE Workshop on Defect and Data Driven Testing (D3T), 2009-2010
  • Member, Steering Committee, IEEE Workshop on Defect and Adaptive Test Analysis (DATA), 2011-present
  • Security Special Session Track Chair, IEEE International Microprocessor Test and Verification (MTV), 2016

Founding Positions:

  • Co-founder, IEEE Asian Symposium on Hardware-Oriented Security and Trust (Asian HOST), 2016-present
  • Co-founder, Journal of Hardware and Systems Security (HASS), 2016-present
  • Co-founder and Co-director, Florida Institute for Cybersecurity (FICS), 2015-present
  • Founder and Director, Center for Hardware Assurance, Security, and Engineering (CHASE), 2012-2015
  • Founder and Director, Comcast Center of Excellenxe in Security Innovation (CSI), 2013-2015
  • Co-founder,, IEEE International Symposium on Hardware-Oriented Security and Trust (HOST), 2008
  • Co-founder,, Trust-Hub, 2010

Editorial Boards:

  • Editor-in-Chief (EIC), Journal of Hardware and Systems Security (HASS), 2016-present
  • Associate Editor-in-Chief (EIC), IEEE Design & Test, 2013-present
  • Associate Editor, ACM Transactions on Design Automation of Electronic Systems (TODAES)
  • Associate Editor, IEEE Design & Test of Computers, 2009-Present
  • Associate Editor, Journal of Low Power Electronics (JOLPE), 2010-present
  • Associate Editor, Journal of Electronic Testing: Theory and Applications (JETTA), 2007-present
  • Editor, TTTC News Letter, 2008-2010
  • Guest Editor, IEEE Transactions on Multi-Scale Computing Systems, Special Issue on “Hardware and Software Cross-Layer Technologies for Trustworthy and Secure Computing”, Guest Editors: Shiyan Hu (Michigan Technological University), Yier Jin (University of Central Florida), Mark M. Tehranipoor (University of Connecticut), Kenneth Heffner (Honeywell), 2015
  • Guest Editor, IEEE Design & Test Special Issue on "On-Chip Structures for Smarter Silicon", Guest Editors: Mohammad Tehranipoor (UConn) and LeRoy Winemberg (Freescale Semiconductor), 2012
  • Guest Editor, IEEE Computer Society Computing Now Special Issue on "Hardware Security and Trust", Guest Editors: Mohammad Tehranipoor (UConn) and Farinaz Koushanfar (Rice University), 2010
  • Guest Editor, IEEE Design & Test Special Issue on "Verifying Physical Trustworthiness of Integrated Circuits and Systems", Guest Editors: Mohammad Tehranipoor (UConn) and Farinaz Koushanfar (Rice University), 2009
  • Guest Editor , Special issue on "Test, Defect Tolerance, and Reliability of Nanoscale Devices", Journal of Electronic Testing: Theory and Applications (JETTA), 2007
  • Guest Editor , Special issue on "IR-Drop and power Supply Noise Effects on Design and Tetst of Very Deep Submicron Designs", IEEE Design & Test of Computers, Guest Co-editor: Ken Butler (Texas Instruments), 2007

Session Organizer:

  • Special Session, Physical Attacks: Can Test Save Us?, IEEE VLSI Test Symposium (VTS), 2017
  • Special Session 1, IP Protection, IEEE Microprocessor Test and Verification (MTV), 2016
  • Special Session 2, Test for Security and Trust, IEEE Microprocessor Test and Verification (MTV), 2016
  • Special Session, Test for Security and Trust of Integrated Circuits, International Test Conference (ITC), 2016
  • Special Session, Security Validation in IOT Space, IEEE VLSI Test Symposium (VTS), April 2016
  • Special Session, Electronic Supply Chain Security, IEEE VLSI Design, India, Jan 2016
  • Special Session, New Directions in Hardware Security, IEEE Microprocessor Test Workshop, Austin, 2015, With Domenic Forte (University of Florida)
  • HOT Topic Session on Counterfeit Electronics, IEEE VLSI Test Symposium (VTS), May 2013 (with Ilia Polian, University of Passau)
  • Smart Silicon, IEEE VLSI Test Symposium (VTS), May 2011 (with LeRoy Windemberg, Freescale Semiconductor)
  • Moderator, Roundtable on Hardware Security and Trust, IEEE Design & Test Magazine, September/October 2011

Professional Memberships:

  • Golden Core Member, IEEE
  • Senior Member, IEEE
  • Member, ACM, ACM SIGDA
  • Member, TTTC
  • Member, TTTC Middle East and Africa Group

Program Committee Memberships:

  • Research in Attacks, Intrusions and Defenses (RAID), 2017
  • IEEE Microprocessor Test and Verification (MTV), 2012-present
  • Smart City Security and Privacy (SCSP), 2016
  • Design Automation Conference (DAC), 2011-2014, 2017
  • International Test Conference (ITC)-Asia, 2017-present
  • Design Automation Conference (DAC) Panel Committee, 2013
  • IEEE CS Annual Symposium on VLSI (ISVLSI), 2012-present
  • IEEE Conference on Very Large Scale Integration (VLSI-SoC), 2012
  • International Test Conference (ITC), 2011-present
  • Design, Automation, and Test in Europe (DATE), 2009-2010, 2013, 2016
  • IEEE Asian Test Symposium (ATS), 2010-present
  • European Test Symposium (ETS), 2010-present
  • IEEE VLSI Test Symposium (VTS), 2009-present
  • ACM SIGDA Ph.D. DAC Forum, 2008-2011
  • International Conference on Nano-Networks (Nano-Net), 2011
  • IEEE Workshop on RTL and High Level Testing (WRTLT), 2009-2010
  • ACM Great Lake Symposium on VLSI (GLSVLSI), 2008-present
  • International Conference on Communication Theory, Reliability, and Quality of Service (CTRQ), 2008-present
  • IEEE Int. Workshop on Defect Based Testing (DBT), 2005-2008
  • IEEE Int. Workshop on Data and Defect Drive Test (D3T), 2008-2010
  • IEEE Int. Defect and Adaptive Test Analysis (DATA), 2011-present
  • Int. Conference on Computer Design (ICCD), 2008-present
  • North Atlantic Test Workshop (NATW) 2004-present
  • IEEE Int. Symp. on Defect and Fault Tolerance in VLSI Systems (DFT ), 2005-present
  • IEEE International Design and Test Workshop (IDT), 2006-2012
  • International Symposium on Nanoscale Architectures (NanoArch), 2007-2010
  • IEEE Int. On-Line Testing Symposium (IOLTS), 2009
  • Int. Workshop on Impact of Low-Power Design on Test and Reliability, 2009
  • Workshop on Unique Chips and Systems (UCAS), 2009
  • IEEE Workshop on Design for Reliability and Variability (DRV), 2009

Session Chair:

  • Int. Workshop on Current and Defect-Based Testing (DBT'05)
  • IEEE North Atlantic Test Workshop (NATW), 2006, 2007, 2008, 2009
  • International Symposium on Defect and Fault Tolerance in VLSI Systems (DFT'06)
  • Design Automation Conference (DAC'07)
  • International Symposium on Nanoscale Architectures (NanoArch), 2008
  • International Test Conference (ITC), 2006, 2008, 2009
  • IEEE Workshop on RTL and High Level Testing (WRTLT'08)
  • IEEE VLSI Test Symposium (VTS), 2010
  • International Test Conference (ITC), 2013

Selected Review Activities:

  • National Science Foundation (NSF)
  • IEEE Transactions on Computer-Aided Design of of Integrated Circuits and Systems
  • IEEE Transactions on Very Large Scale Integration Systems
  • IEEE Transactions on Computers
  • ACM Transactions on Design Automation of Electronic Systems (TODAES)
  • Journal of Electronic Testing: Theory and Applications (JETTA)
  • ACM Journal on Emerging Technologies in Computing Systems (JETC)
  • Design, Automation, and Test in Europe (DATE)
  • IEEE Conference on VLSI
  • IEEE Workshop on RTL Test (ARTLT)
  • International Test Conference (ITC)
  • Great Lake Symposium on VLSI (GLSVLSI)
  • IBM Journal of Research and Development
  • IEEE North Atlantic Test Workshop (NATW)
  • IEEE Communication Magazine
  • IEEE VLSI Test Symposium (VTS)
  • International Conference on Microelectronics (ICM)
  • International Journal of Computers and Applications
  • IEEE Asian Test Symposium (ATS)
  • Design Automation Conference (DAC)